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UART_receiver
- 通用串口收发器的移位寄存器 是verilog hDl编写-uart_reg
UART_DMA
- 基于ALTERA公司的NIOSII的串口通信DMA传输设计-NIOSII based on ALTERA s DMA transfer of the serial communication design
Verilog_uart
- 异步通讯串口调试程序，用VERILOG写的，保证能用-Asynchronous communications serial port debugger, using VERILOG written assurance can be used
uartverilog
- 用verilog语言编写uart程序。模拟串口时序进行收发数据操作。-verilog uart
UART
- 利用Verilog实现UART收发数据功能-Verilog UART send and receive data functions to achieve